Architecture Dependent Technology Mapping for Area Minimization in FPGAs Design
碩士 === 中原大學 === 資訊工程研究所 === 86 === In this thesis, we proposed a new technology mapping algorithmwhich maps an original combinational circuit to a network consistingof configurable logic blocks (CLBs). This algorithm tries tominimize the number of CLBs in the resulting network and keep th...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1998
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| Online Access: | http://ndltd.ncl.edu.tw/handle/74827998783507892617 |