A New Architecture Specific Technology Mapping Algorithm
碩士 === 中原大學 === 資訊工程研究所 === 86 === In this thesis, we propose a new technology mapping, called ArchMap,for LUT-based FPGAs with the hard-wired connection architecture in PLBs. To minimize the delay in the mapped network.ArchMap are divided into two step as follows:1. Mapping the initial circuit to a...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
1998
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| Online Access: | http://ndltd.ncl.edu.tw/handle/52142680070757393540 |