Multi-Rate Digital Redesign of a Cascaded Analogue Interval System with Input Time Delays
碩士 === 國立成功大學 === 電機工程學系 === 86 ===
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1998
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Online Access: | http://ndltd.ncl.edu.tw/handle/25394159025252324689 |
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ndltd-TW-086NCKU14420052015-10-13T11:06:13Z http://ndltd.ncl.edu.tw/handle/25394159025252324689 Multi-Rate Digital Redesign of a Cascaded Analogue Interval System with Input Time Delays 含有輸入時延之不確定系統其多重採樣數位再設計 LIU, CHANG-CHI 劉昌奇 碩士 國立成功大學 電機工程學系 86 Jason Sheng-Hong Tsai 蔡聖鴻 1998 學位論文 ; thesis 85 zh-TW |
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NDLTD |
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zh-TW |
format |
Others
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NDLTD |
description |
碩士 === 國立成功大學 === 電機工程學系 === 86 ===
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author2 |
Jason Sheng-Hong Tsai |
author_facet |
Jason Sheng-Hong Tsai LIU, CHANG-CHI 劉昌奇 |
author |
LIU, CHANG-CHI 劉昌奇 |
spellingShingle |
LIU, CHANG-CHI 劉昌奇 Multi-Rate Digital Redesign of a Cascaded Analogue Interval System with Input Time Delays |
author_sort |
LIU, CHANG-CHI |
title |
Multi-Rate Digital Redesign of a Cascaded Analogue Interval System with Input Time Delays |
title_short |
Multi-Rate Digital Redesign of a Cascaded Analogue Interval System with Input Time Delays |
title_full |
Multi-Rate Digital Redesign of a Cascaded Analogue Interval System with Input Time Delays |
title_fullStr |
Multi-Rate Digital Redesign of a Cascaded Analogue Interval System with Input Time Delays |
title_full_unstemmed |
Multi-Rate Digital Redesign of a Cascaded Analogue Interval System with Input Time Delays |
title_sort |
multi-rate digital redesign of a cascaded analogue interval system with input time delays |
publishDate |
1998 |
url |
http://ndltd.ncl.edu.tw/handle/25394159025252324689 |
work_keys_str_mv |
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