Functional Testing for Cache Memory Systems
碩士 === 國立成功大學 === 電機工程學系 === 86 === In this thesis, an efficient test algorithm for on-chip caches is proposed. In this algorithm, the processor on a chip is controlled by a test program and acts as a test controller to activate fault effec...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1998
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| Online Access: | http://ndltd.ncl.edu.tw/handle/49165383347271627664 |