Memory Hierarchy Design for Irregular Data Accesses
博士 === 國立清華大學 === 資訊工程學系 === 86 === In the past the design philosophy for memory hierarchy was mainly based onrules of catching data locality for reducing memory latency. This thoughtmakes cache design preferring applications with regular data accesses.Ho...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
1998
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| Online Access: | http://ndltd.ncl.edu.tw/handle/36992891136943325855 |