Systematic Layout Procedure for Semiconductor Fabrication Facilities
碩士 === 國立交通大學 === 工業工程與管理系 === 87 === Semiconductor fabrication facilities cannot operate at optimal levels and add to extra operating expenses because their poor floor layouts hamper manufacturing and material handling efficiency. Therefore, designing an effective layout is the prerequisite for bui...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/95883150921067351397 |