| Summary: | 碩士 === 國立交通大學 === 電子工程系 === 87 === In this thesis, we investigate the CVD TEOS polyoxides deposited on disilane polysilicon films and stacked polysilicon films with rapid thermal N2O (RTN2O) annealing. It is found that the smoother polysilicon/polyoxide interface can be obtained by replacing conventional silane polysilicon films with disilane polysilicon films. Therefore, both the PECVD TEOS and LPCVD TEOS polyoxides deposited on disilane polysilicon films exhibit higher dielectric breakdown field, lower leakage current and lager charge to breakdown (Qbd) than those deposited on silane polysilicon films. In addition, we present a stacked polysilicon film as bottom polysilicon film (poly-1) to improve polyoxide integrity due to that stacked sample has smoother polysilicon/polyoxide interface, less phosphorus in polyoxide and more nitrogen incorporation at polysilicon/polyoxide interface than non-stacked sample. The Qbd of the stacked sample with RTN2O annealing is as high as 55.4 C/cm^2 for a polyoxide of 130A thickness.
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