Low-Voltag Low-Power Circuit and ARchitecture Designs for CMOS Receiver Front End
博士 === 國立中央大學 === 電機工程研究所 === 87 === The object of this research is to develop circuit and Architecture techniques for the front end of data receiver with low supply-voltage and low power-consumption. With the blooming progresses on personal communication services (PCS), the de...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/69058804796659447796 |