Design of an FPGA for Field Programmable Multi-Chip System
碩士 === 國立臺灣大學 === 資訊工程學研究所 === 87 === In existing architecture, both the logic configuration and the network connectivity remain fixed for the duration of the emulation. Each emulated gate is mapped to one FPGA equivalent gate and each emulated signal is allocated to one FPGA pin. Thus fo...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/12175045925209337574 |