Static and Dynamic Logic Circuit Techniques Suitable for Low-Voltage CMOS VLSI
博士 === 國立臺灣大學 === 電機工程學研究所 === 87 === In this thesis, static and dynamic logic circuit techniques suitable for low-voltage CMOS VLSI are described. In Chapter 2, a bootstrapped circuit to enhance the speed performance of a CMOS driver that drives a large capacitive load under a low supply voltage is...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/48995916791703435868 |