Static and Dynamic Logic Circuit Techniques Suitable for Low-Voltage CMOS VLSI

Static and Dynamic Logic Circuit Techniques Suitable for Low-Voltage CMOS VLSI

博士 === 國立臺灣大學 === 電機工程學研究所 === 87 === In this thesis, static and dynamic logic circuit techniques suitable for low-voltage CMOS VLSI are described. In Chapter 2, a bootstrapped circuit to enhance the speed performance of a CMOS driver that drives a large capacitive load under a low supply voltage is...

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Bibliographic Details
Main Authors:	Chih-Hong Lou, 樓志宏
Other Authors:	James. B. Kuo
Format:	Others
Language:	zh-TW
Published:	1999
Online Access:	http://ndltd.ncl.edu.tw/handle/48995916791703435868

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