Modeling of PD-SOI Dynamic Threshold Voltage MOS (DTMOS) Devices
碩士 === 國立臺灣大學 === 電機工程學研究所 === 87 === In this thesis, analytical models for partially-depleted SOI dynamic-threshold MOS (DTMOS) devices are described. In Chapter 2, using the proposed quasi-2D approach, a closed-form threshold-voltage model for short-channel PD SOI DTMOS devic...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/17904169823882612738 |