Chip Design and Implementation of an ATM/ABR Schedule Processor
碩士 === 國立中正大學 === 電機工程研究所 === 88 === In the thesis, an Available Bit Rate (ABR) chip is designed and implemented, which used in Asynchronous Transmission Mode (ATM) network. The features of the ABR service chip are conforming a low cell loss ration requirement and tolerating the variation of through...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/50233936063910513114 |