VLSI Design and Research on 10 Bits Successive-Approximation A/D Converter
碩士 === 中原大學 === 電子工程學系 === 88 === This thesis presents the design and implementation of a 10 bits successive approximation A/D converter. The core circuit blocks of the converter consist of a comparator, charge scaling D/A converter and digital control circuit. In order to achieve the res...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/43561598871980445091 |