A Study on Reducing Memory Access Latency for F-COMA System Design and Implementation of Its Simulation and Evaluation Environment
碩士 === 國立交通大學 === 資訊工程系 === 88 === F-COMA is designed to reduce memory access latencies while program working set exceed the processor cache size. Unfortunately, there are many memory access overhead in F-COMA. For example, migratory sharing patterns will induce superfluous memory reques...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/33023799937237033692 |