A Current-Mode Read/Write Circuit for Low Operation Power/High Speed SRAM and Its Application in SRAM Chip Implementation
碩士 === 國立交通大學 === 電子工程系 === 88 === High-performance and low-power SRAM design always focus on reducing dynamic power dissipation at the operating state and decreasing DC current and leakage current at the standby state. To reduce operation power without decreasing read/write speed, we pro...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/80367810933791379619 |