Key Integration Technologies of Damascene Interconnection on Cu/Low-K Dielectrics
碩士 === 國立交通大學 === 電子工程系 === 88 === As device geometry is scaled down to deep submicron region, the resistance-capacitance (RC) delay of interconnection becomes a dominant part of the total delay for device switching. Conventional aluminum wires with a resistivity of 3.0 mW?cm and SiO2 intermetal die...
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| Format: | Others |
| Language: | en_US |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/33042540265735829040 |