Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory
碩士 === 國立中山大學 === 電機工程學系研究所 === 88 === Abstract Four high-performance circuits design techniques for embedded DRAM are proposed. First, a negative voltage generator having high efficiency is proposed to provide the negative voltage for the modified word line driver. The negative voltage genera...
Main Authors: | Wei-Shiun Chen, 陳維勳 |
---|---|
Other Authors: | Jyi-Tsong Lin |
Format: | Others |
Language: | zh-TW |
Published: |
2000
|
Online Access: | http://ndltd.ncl.edu.tw/handle/28026652098279643110 |
Similar Items
-
High Performance Circuits Design for 1.5V Dynamic Random Access Memory
by: Cheng-Chih Hsu, et al.
Published: (1999) -
The effects of TiN Growth for the Embedded Dynamic Random Access Memory
by: Mao-Hsin Li, et al.
Published: (2014) -
Low Voltage Operation Circuits for Resistive Random Access Memory
by: Wu, Che-Wei, et al.
Published: (2011) -
A Low-Voltage Sensing and Write-Back Scheme for Embedded Dynamic Random Access Memory
by: Chen, Yu-Lin, et al.
Published: (2015) -
Embedded Memory Hierarchy Exploration Based on Magnetic Random Access Memory
by: Luís Vitório Cargnini, et al.
Published: (2014-08-01)