Feature Scale Simulation of Copper Deposition for IC Interconnection
碩士 === 國立清華大學 === 化學工程學系 === 88 === Because the trenches or vias of IC interconnect are very tiny and have large aspect ratio, how to deposit copper without void formation is very important. Development of numerical method from FDM、FEM to BEM or even Free-Element Method enable us to get approximate...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2000
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/13959864307753170832 |