Circuit Techniques Suitable for Low-Voltage CMOS VLSI
碩士 === 國立臺灣大學 === 電機工程學研究所 === 88 === This thesis reports two low-voltage VLSI circuit techniques. In chapter 2, a two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM with single-bit-line simultaneous read-and-write access (SBLSRWA) capability is proposed. With a unique structu...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/53560814637533983468 |