| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 88 === The trench MOSFET’s are now widely used as the power MOSFET’s. Their on resistances have been steadily reduces by scaling down the cell pitch. However, in the typical process of conventional trench MOSFET,6~7mask layers are needed, including field oxide、trench、n+ implantation、polysilicon gate、contact and metal define. So it has been discussed with emphasis on the reduction of on-resistances by scaling down the cell pitch and the cost-effective by reducing the number of mask layers.
In this dissertation, a new and simplified process for fabricating a high density n-channel trench gate power MOSFET using four mask layers and a sidewall spacer technique is proposed. Use of this process has enabled a remarkably increased high trench MOSFET density with a cell pitch of 2 μm to be realized.
Furthermore, the salicide technology has been used in this simplified process, then made it possible to reduce the number of processing steps. This device structure provides a solution to the cost-effective production of trench gate power MOSFET’s.
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