A Timing-Driven Global Router with Pin Assignment for Building Blocks
碩士 === 逢甲大學 === 資訊工程學系 === 89 === In this paper, we proposed an extended algorithm, which combined with Iterated 1-Steiner tree and Simulated Annealing (SA) algorithms. It was used to find a Minimal Rectilinear Steiner Tree (MRST) for a net on a grid graph. The main purpose of this algori...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/36487426378426611160 |