BIST for ADCs/DACs Linearity Testing
碩士 === 國立中央大學 === 電機工程研究所 === 89 === In this thesis, a new test methodology of BIST for on-chip ADC-DAC pair linearity testing is proposed. The on-chip digital signal processing unit and micro processing unit are used as test sources for calculating the test results. Hence, the on-chip...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/50510196128988417436 |