Design of 10-bit, 20MHz sampling rate CMOS pipelined analog-to-digital converter
碩士 === 國立清華大學 === 電子工程研究所 === 89 ===
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/92382673690541352171 |