A Novel 2-Bit Per Cell Trench-Gate Flash Memory
碩士 === 國立清華大學 === 電子工程研究所 === 89 === A 2-bit per cell flash memory based on a novel trenched gate structure is proposed. Its advantages include high density, large read current, easy fabrication steps, and avoiding complicated peripheral circuit. Using 2D and 3D device simulation tools,...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/89296609749500161313 |