A Novel 2-Bit Per Cell Trench-Gate Flash Memory

• Main Authors: Kung-Hong Lee, 李昆鴻
• Other Authors: Charles Ching-Hsiang Hsu
• Format: Others
• Language: zh-TW
• Published: 2001
• Online Access: http://ndltd.ncl.edu.tw/handle/89296609749500161313

碩士 === 國立清華大學 === 電子工程研究所 === 89 === 　　A 2-bit per cell flash memory based on a novel trenched gate structure is proposed. Its advantages include high density, large read current, easy fabrication steps, and avoiding complicated peripheral circuit. Using 2D and 3D device simulation tools, the effects of cell structure, and operation conditions on memory performance are discussed. The feasibility of this novel cell is demonstrated through simulated results of proposed fabrication steps. This work has shown that the novel 2-bit trenched gate flash structure is suitable for future giga-bit flash memory application.