An Advanced Memory Built-In Self-Diagnosis Compiler for System-on-Chip
碩士 === 國立清華大學 === 電機工程學系 === 89 === Testing and diagnosis are becoming important issues in system-on-chip (SoC) development while more and more embedded cores are integrated into single chips. We propose a built-in self-test and self-diagnosis scheme for embedded SRAMs and CAMs. It suppor...
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ndltd-TW-089NTHU04420502016-07-04T04:17:18Z http://ndltd.ncl.edu.tw/handle/02519766826668410062 An Advanced Memory Built-In Self-Diagnosis Compiler for System-on-Chip 前瞻性系統晶片記憶體內嵌式自我診斷電路產生器 Ruey-Shing Tzeng 曾瑞興 碩士 國立清華大學 電機工程學系 89 Testing and diagnosis are becoming important issues in system-on-chip (SoC) development while more and more embedded cores are integrated into single chips. We propose a built-in self-test and self-diagnosis scheme for embedded SRAMs and CAMs. It supports manufacturing test as well as diagnosis for design verification and yield improvement. With low hardware cost, our memory BIST can handle various types of SRAM and CAM including pipeline and multi-port. In additional, a test scheduling methodology and a BIST compiler is also implemented, which aims on reducing the testing time as well as test development time. To simplify the routing and reduce the test time of the proposed BISD circuit, a hamming syndrome compression scheme is also proposed. By using a simplified Huffman coding scheme and partitioning each 256-bit Hamming syndrome into fixed-size blocks. The average compression ratio is reduced to about 9% assuming 16-bit blocks. Cheng-Wen Wu 吳誠文 2001 學位論文 ; thesis 59 en_US |
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碩士 === 國立清華大學 === 電機工程學系 === 89 === Testing and diagnosis are becoming important issues in system-on-chip (SoC) development while more and more embedded cores are integrated into single chips. We propose a built-in self-test and self-diagnosis scheme for embedded SRAMs and CAMs. It supports manufacturing test as well as diagnosis for design verification and yield improvement. With low hardware cost, our
memory BIST can handle various types of SRAM and CAM including pipeline and multi-port. In additional, a test scheduling methodology and a BIST compiler is also implemented, which aims
on reducing the testing time as well as test development time. To simplify the routing and reduce the test time of the proposed BISD circuit, a hamming syndrome compression scheme is also proposed. By using a simplified Huffman coding scheme and partitioning each 256-bit Hamming syndrome into fixed-size blocks. The average compression ratio is reduced to about 9% assuming 16-bit blocks.
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Cheng-Wen Wu |
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Cheng-Wen Wu Ruey-Shing Tzeng 曾瑞興 |
author |
Ruey-Shing Tzeng 曾瑞興 |
spellingShingle |
Ruey-Shing Tzeng 曾瑞興 An Advanced Memory Built-In Self-Diagnosis Compiler for System-on-Chip |
author_sort |
Ruey-Shing Tzeng |
title |
An Advanced Memory Built-In Self-Diagnosis Compiler for System-on-Chip |
title_short |
An Advanced Memory Built-In Self-Diagnosis Compiler for System-on-Chip |
title_full |
An Advanced Memory Built-In Self-Diagnosis Compiler for System-on-Chip |
title_fullStr |
An Advanced Memory Built-In Self-Diagnosis Compiler for System-on-Chip |
title_full_unstemmed |
An Advanced Memory Built-In Self-Diagnosis Compiler for System-on-Chip |
title_sort |
advanced memory built-in self-diagnosis compiler for system-on-chip |
publishDate |
2001 |
url |
http://ndltd.ncl.edu.tw/handle/02519766826668410062 |
work_keys_str_mv |
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