Low Power and Low Voltage CMOS VLSI Cache Circuit Designs
博士 === 國立臺灣大學 === 電機工程學研究所 === 89 === In this thesis, new circuits and structures of cache memories suitable for low-power and low-voltage applications are described. In Chapter 2, the fundamental theory of cache memory is overviewed. In Chapter 3, a 1-V 128-kb four-way set-associative C...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/92974344879434407429 |