高靈敏度壓電阻應力計製程研究與u-BGA構裝應力量測分析

• Main Authors: Jeng-shian Su, 蘇政賢
• Other Authors: 羅本喆
• Format: Others
• Language: zh-TW
• Published: 2002
• Online Access: http://ndltd.ncl.edu.tw/handle/75101827813874869819

碩士 === 國防大學中正理工學院 === 兵器系統工程研究所 === 90 === ABSTRACT As die size continuously scales down in modern IC and the circuit density in an IC go higher, thermal and thermal-mechanical problems in modern microelectronic packaging become more and more serious. Thus, powerful tools for stress evaluation in packaging are needed. To this end, this thesis focused on stress distribution measurement techniques in packaging through piezoresistive characteristics. There are two major studies in this thesis: First, to design and fabricate piezoresisitve stress sensors with high sensitivity through putting different doping concentrations on piezoresistors. Secondly, to measure stress distribution on the test chips inside μ-BGA package, which is put in a thermostat with thermal cycle, and to measure chip stress in the packaging by putting different level of powers on the test chip. In conclusion, highly sensitive piezoresistive stress sensors have been successfully designed and fabricated; and chip stress distributions from the thermostat experiments as well as different power level experiments were successfully measured.