Dispatching Rules for Possibly Delayed Lots In an IC Foundry
碩士 === 國立交通大學 === 工業工程與管理系 === 90 === In order to improve the on-time delivery of IC foundries, this research develops a dynamic dispatching rule that gives higher priority to thee possibly delayed lots. The basic idea is by giving an alarm whenever the progress of a manufacturing wafer l...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/54948971923481811130 |