Dispatching Rules for Possibly Delayed Lots In an IC Foundry
碩士 === 國立交通大學 === 工業工程與管理系 === 90 === In order to improve the on-time delivery of IC foundries, this research develops a dynamic dispatching rule that gives higher priority to thee possibly delayed lots. The basic idea is by giving an alarm whenever the progress of a manufacturing wafer l...
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ndltd-TW-090NCTU00310122016-06-27T16:08:59Z http://ndltd.ncl.edu.tw/handle/54948971923481811130 Dispatching Rules for Possibly Delayed Lots In an IC Foundry 晶圓製造廠可能延遲批量之派工法則 Wen-Yang Tseng 曾文揚 碩士 國立交通大學 工業工程與管理系 90 In order to improve the on-time delivery of IC foundries, this research develops a dynamic dispatching rule that gives higher priority to thee possibly delayed lots. The basic idea is by giving an alarm whenever the progress of a manufacturing wafer lot is behind its lot control schedule. The lot control schedule defines the target progress of each operation of the lot. Based on the lot information provided by the lot control schedule system, we adjust the dispatching priority of wafer lot. Simulation results show that the proposed dynamic dispatching rule can effectively reduce the number of delay lots if the lot control schedule is appropriately defined. Muh-Cherng Wu 巫木誠 2002 學位論文 ; thesis 56 zh-TW |
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碩士 === 國立交通大學 === 工業工程與管理系 === 90 === In order to improve the on-time delivery of IC foundries, this research develops a dynamic dispatching rule that gives higher priority to thee possibly delayed lots. The basic idea is by giving an alarm whenever the progress of a manufacturing wafer lot is behind its lot control schedule. The lot control schedule defines the target progress of each operation of the lot. Based on the lot information provided by the lot control schedule system, we adjust the dispatching priority of wafer lot. Simulation results show that the proposed dynamic dispatching rule can effectively reduce the number of delay lots if the lot control schedule is appropriately defined.
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Muh-Cherng Wu |
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Muh-Cherng Wu Wen-Yang Tseng 曾文揚 |
author |
Wen-Yang Tseng 曾文揚 |
spellingShingle |
Wen-Yang Tseng 曾文揚 Dispatching Rules for Possibly Delayed Lots In an IC Foundry |
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Wen-Yang Tseng |
title |
Dispatching Rules for Possibly Delayed Lots In an IC Foundry |
title_short |
Dispatching Rules for Possibly Delayed Lots In an IC Foundry |
title_full |
Dispatching Rules for Possibly Delayed Lots In an IC Foundry |
title_fullStr |
Dispatching Rules for Possibly Delayed Lots In an IC Foundry |
title_full_unstemmed |
Dispatching Rules for Possibly Delayed Lots In an IC Foundry |
title_sort |
dispatching rules for possibly delayed lots in an ic foundry |
publishDate |
2002 |
url |
http://ndltd.ncl.edu.tw/handle/54948971923481811130 |
work_keys_str_mv |
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