Preparation of Ni/Cu Bumps and Interconnect Using Electroless Plating Technique for Flip Chip Bonding

碩士 === 國立交通大學 === 材料科學與工程系 === 90 === This thesis employed the electroless plating technology, accompanying with the photolithography and etching process, to prepare Ni/Cu double-layered metal bumps for flip chip packaging of high-frequency devices. The electroless plating of Cu is relati...

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Bibliographic Details
Main Authors: Chen Chi-Chin, 陳啟晉
Other Authors: T. E. Hsieh
Format: Others
Language:zh-TW
Published: 2002
Online Access:http://ndltd.ncl.edu.tw/handle/83366147503736610348
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Summary:碩士 === 國立交通大學 === 材料科學與工程系 === 90 === This thesis employed the electroless plating technology, accompanying with the photolithography and etching process, to prepare Ni/Cu double-layered metal bumps for flip chip packaging of high-frequency devices. The electroless plating of Cu is relatively inexpensive. Further, Cu has superior conduction property(Resistivity = 1.7 μΩ-cm), resistance to electromigration and stress-induced void formation. We hence adopted the electroless plating Ni and Cu to fabricate the metal lines and bumps. We compared the difference on surface morphology and resistivity for the deposition film on polished and unpolished AlN substrates. The results showed that the electroless deposited film on a polished AlN surface exhibits a more uniform surface morphology and lower resistivity than the unpolished one. In addition, by forming Ni metal line on AlN substrate within photolithography process, We were able to accomplish the structure of 2μm thick Ni/Cu double layer metal lines and 5μm thick metal bumps by using the electroless plating technique.