Transitive Closure Graph Based Representations for VLSI Floorplan Design
博士 === 國立交通大學 === 資訊科學系 === 90 === As technology advances, the circuit size in modern VLSI design increases dramatically. To handle the increasing design complexity, hierarchical designs and IP modules are widely used for design convergence, which makes floorplaning more important than ev...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/65969111178011186929 |