Investigation and Desgin of All Digital Phase Locked Loop
碩士 === 國立交通大學 === 電子工程系 === 90 === In this thesis, we present the design of an all digital phase locked loop (ADPLL), which consists of a phase detector (PD), a frequency detector (FD), a digitally controlled oscillator (DCO), a control unit and some auxiliary logic circuits. A new phase tracking al...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/40526318520931193943 |