The Design of A 1.8GHz CMOS RF Frequency Synthesizer for DCS-1800 Application
碩士 === 國立交通大學 === 電信工程系 === 90 === Phase-locked loop (PLL) based fractional-N frequency synthesizers have played an important role in RF front-ends. The purpose of this work is to implement a RF frequency synthesizer with a monolithic LC-tank voltage-controlled oscillator (VCO). The architecture of...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/42566513729575724494 |