An 3.3V 8-bit 150MS/s Dual-channelTime-interleave Pipelined A/D Converter
碩士 === 國立中央大學 === 電機工程研究所 === 90 === The subject of the thesis is to design an 8-bit, 150MS/s analog to digital converter(ADC) under a 3.3V supply. It can be applied in Gigabit Ethernet and RGB-to-LCD video signal processing interface circuits. This converter utilizes parallel-pipelined architectu...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/66520882481676994041 |