Study on Amorphous Silicon Carbide Barrier Dielectric Materials

碩士 === 國立中山大學 === 物理學系研究所 === 90 === In the generation of deep submicron semiconductor fabrication,transmission delay is primarily caused by the parasitic resistance and capacitance (RC) in the multilevel interconnects. Besides,electromigration is also a serious issue for the reliability of devices...

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Main Authors: Chih-Hung Chen, 陳致宏
Other Authors: Ting-Chang Chang
Format: Others
Language:en_US
Published: 2002
Online Access:http://ndltd.ncl.edu.tw/handle/94551691489117542359
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spelling ndltd-TW-090NSYS51980312015-10-13T10:27:57Z http://ndltd.ncl.edu.tw/handle/94551691489117542359 Study on Amorphous Silicon Carbide Barrier Dielectric Materials 非結晶碳化矽阻障介電材料之特性研究 Chih-Hung Chen 陳致宏 碩士 國立中山大學 物理學系研究所 90 In the generation of deep submicron semiconductor fabrication,transmission delay is primarily caused by the parasitic resistance and capacitance (RC) in the multilevel interconnects. Besides,electromigration is also a serious issue for the reliability of devices . There are two principle methods of reducing the RC delay. The first method is to replace the Al wires with Cu interconnects which supply lower resistivity and high resistance to electromigration. The second method is to use a lower dielectric constant material as the inter-metal dielectric. But in Copper metallization,the key issue of this technology is the formation of a thin barrier layer for Cu on the surface of the SiC film to prevent the absorption of water and diffusion of Cu. In this study,we employed films SiC base compounds to investigate their chemical bonds, I-V characteristics comparisons with Al and Cu gate. On the other hand, because of serious C-V hysteretic phenomena, we try to analyze and build up models. There five models is reasonable for our experiment: (1) mobile ions, (2) dielectric polarization, (3) carrier injection, (4) gate-electrons injection, and (5) bound charges. They happens in different materials and structures. Ting-Chang Chang 張鼎張 2002 學位論文 ; thesis 60 en_US
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description 碩士 === 國立中山大學 === 物理學系研究所 === 90 === In the generation of deep submicron semiconductor fabrication,transmission delay is primarily caused by the parasitic resistance and capacitance (RC) in the multilevel interconnects. Besides,electromigration is also a serious issue for the reliability of devices . There are two principle methods of reducing the RC delay. The first method is to replace the Al wires with Cu interconnects which supply lower resistivity and high resistance to electromigration. The second method is to use a lower dielectric constant material as the inter-metal dielectric. But in Copper metallization,the key issue of this technology is the formation of a thin barrier layer for Cu on the surface of the SiC film to prevent the absorption of water and diffusion of Cu. In this study,we employed films SiC base compounds to investigate their chemical bonds, I-V characteristics comparisons with Al and Cu gate. On the other hand, because of serious C-V hysteretic phenomena, we try to analyze and build up models. There five models is reasonable for our experiment: (1) mobile ions, (2) dielectric polarization, (3) carrier injection, (4) gate-electrons injection, and (5) bound charges. They happens in different materials and structures.
author2 Ting-Chang Chang
author_facet Ting-Chang Chang
Chih-Hung Chen
陳致宏
author Chih-Hung Chen
陳致宏
spellingShingle Chih-Hung Chen
陳致宏
Study on Amorphous Silicon Carbide Barrier Dielectric Materials
author_sort Chih-Hung Chen
title Study on Amorphous Silicon Carbide Barrier Dielectric Materials
title_short Study on Amorphous Silicon Carbide Barrier Dielectric Materials
title_full Study on Amorphous Silicon Carbide Barrier Dielectric Materials
title_fullStr Study on Amorphous Silicon Carbide Barrier Dielectric Materials
title_full_unstemmed Study on Amorphous Silicon Carbide Barrier Dielectric Materials
title_sort study on amorphous silicon carbide barrier dielectric materials
publishDate 2002
url http://ndltd.ncl.edu.tw/handle/94551691489117542359
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