IC Design and Implementation of 6-T SRAM Cell Using Dual Threshold Voltage Transistors and Low Power Quenchersand Programmable PLL-Based Frequency Multiplier
碩士 === 國立中山大學 === 電機工程學系研究所 === 90 === Two different topics associated with their respective applications are proposed in this thesis. The first topic is the implementation of a 6-T SRAM cell using dual threshold voltage transistors and low power quenchers. We proposed a SRAM cell with dual thresh...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/89494193879693845384 |