The Implementation of Task Evaluation and Scheduling Mechanisms for Processor-in-Memory Systems
碩士 === 國立中山大學 === 電機工程學系研究所 === 90 === In order to reduce the performance gap between the processor and the memory subsystem, many researchers attempt to integrate the processor and memory on a single chip in recent years. Therefore a new class of computer architecture: PIM (Processor-in-Memory) are...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/78642280010594694304 |