The Design of an Effective Load-Balance Mechanism for Processor-in-Memory Systems
碩士 === 國立中山大學 === 電機工程學系研究所 === 90 === PIM （Processor-in-Memory） architectures have been proposed in recent years for the purpose of reducing performance gap between processor and memory. This new class of computer architectures attempts to integrate processor and memory on a single one chip。We prop...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/96686451297728245640 |