An Instruction Set Architecture Simulator for Embedded Processor Design
碩士 === 國立清華大學 === 電機工程學系 === 90 === The design evaluation of embedded processors at each level is an important issue, the architecture level especially. The accurate evaluation at the architecture level is the key to improving the system performance, but it is not easy to fix the complete...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/05833976379712231803 |