Design and Implementation of Low-Power and High-Noise-Immunity Phase-Locked Loop
碩士 === 淡江大學 === 電機工程學系 === 90 === In this paper, a low power and high noise immunity VCO and HDPLL is proposed and analyzed. The novel voltage controlled oscillator (VCO) is proposed to reduce the total power consumption for half-digital phase locked loop (HDPLL) application. By HSPICE simulation re...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/63602975204666663965 |