The Implemetation of Modified Discrete Fourier Algorithm by FPGA
碩士 === 國防大學中正理工學院 === 電子工程研究所 === 91 === The main purpose of this thesis is to use the Verilog Hardware Description Language cooperated with Matlab simulations to verify the Modified Discrete Fourier Transform (MDFT) Algorithm. Via the algorithm, the fundamental frequency Phasor can be calculated ve...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/67064194912641274843 |