Formal Specification Generation by Applying Error Trace Analysis for Semi-Formal Verification
碩士 === 國立中正大學 === 資訊工程研究所 === 91 === A major goal in hardware design is to guarantee that a design module conforms to its requirement specifications such as functionality demands. Therefore, verification plays an important role in the design process. With rapid technology progress in deep...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2003
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/89050839487380520589 |