Crosstalk Alleviation, Power Minimization and Timing Optimization for Dynamic PLAs
博士 === 國立中正大學 === 電機工程研究所 === 91 === The dynamic PLA style has become popular in designing high performance microprocessors because of its high speed and predictable routing delay. However, like all other dynamic circuits, dynamic PLAs have suffered from crosstalk noise and large power co...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/06801900443203180817 |