Robust PLL Circuit Design via topological µ-synthesis
碩士 === 國立中正大學 === 機械系 === 91 === The designs of Phase-Locked Loop are always in two ways. One is to improve the hardware of the PLL such as to design a new phase detector or a new voltage-controlled oscillator circuit; another way is to design the PLL as a system concept without changing...
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| Format: | Others |
| Language: | en_US |
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2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/63504527953560422085 |