A Low-Latency hardware Architecture for SOVA-based Turbo Decoder
碩士 === 長庚大學 === 電機工程研究所 === 91 === Turbo coding is a technique which provides a performance very close to the Shannon capacity limit. Turbo code was broadly employed in various communication system. Moreover, recently, a turbo code has been accepted as the channel coding standard for the third gener...
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/45603411572882865696 |