CMOS RF Front-end Circuits for a 5.7 GHz Heterodyne Receiver
碩士 === 長庚大學 === 半導體科技研究所 === 91 === The development of CMOS RFIC design lets the fabrication of System-on-Chip (SOC), consisting of three blocks, such as radio frequency (RF), intermediate frequency (IF) and baseband frequency to be realizable. Therefore, it reduces considerably the cost and speeds...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/50452444462274737196 |