Full-Chip Crosstalk-Driven Gridless Routing on SoC Physical Integration
碩士 === 中華大學 === 資訊工程學系碩士班 === 91 === As the process technology advances into the deep-submicro age, the process and design progress makes system-on-a-chip (SoC) possible. To obtain high-quality chip performance, well-designed IPs have been used to reduced design time of a SoC chip. For th...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/27262373371588155674 |