VLSI Circuit Design of Motion Estimation Unit for Full-Search Block-Matching
碩士 === 中原大學 === 電機工程研究所 === 91 === In this thesis, we propose a novel VLSI architecture for Motion Estimation Unit, including PE-array, Search Area Ram, Address Generation Unit, and Control Unit. Our architecture use full-search block-matching algorithm for block-matching. The Motion Estimation Unit...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/nauat5 |